Apple Boston SoC Physical Design Engineer, STA/Timing in Boston, Massachusetts
Boston SoC Physical Design Engineer, STA/Timing
The ideal candidate will have 3+ years of hands-on experience in STA.
Familiar with all aspects of timing of large high-performance SoC designs in sub-micron technologies.
Proficient in STA and methodologies for timing closure, and have a good understanding of noise, cross-talk, and OCV effects, among others.
Familiar with circuit modeling, including SPICE models and worst-case corner selection.
Strong programming skills with Perl, TCL.
Experience with large design STA and Timing Closure.
Familiar with ECO techniques and implementation.
Good communicator who can accurately describe issues and follow them through to completion.
- Work with design teams to understand and debug constraints, facilitate logic changes to improve timing. - Work with Physical Design team, highlighting issues and best practices. - Help create timing ECO’s for project tapeout. - Create/maintain scripts and methodologies for analysis and runs. - Create documentation and help with guidelines/specs. - Deep analysis of timing paths to identify key issues. - Implement timing infrastructure.
Education & Experience
Bachelor’s degree or higher in Electrical Engineering, Computer Science, or related field.
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