Intel DFT (MBIST) Engineer in Hudson, Massachusetts
Seeking candidates for Design for Test (DFT) Engineering on large IP and SOC projects. The successful candidate will be able to quickly contribute to DFT integration and validation in large, complex IPs or SOCs. This role is specifically targeted for array test.
Understand DFT architectures and their relationships with clocks, resets, debug, and power.
Array Test implementation and verification
Enabling SOC integration and verification
Enable structural design team to implement high quality DFT with industry leading coverage.
Work with the tool methodology teams on defining and regressing the tool flows.
Deliver patterns to post-Si and manufacturing teams support bring-up
Ideal candidate is a self-starter, can organize complex issues and drive them to closure. Candidate can multitask and prioritize. Candidate can mentor and lead junior engineers.
Candidate should exhibit excellent verbal and written communication skills and capable of working in a fast paced ever-changing environment.
Bachelors in Electrical or Computer Engineering.
DFT engineer with 3+ years of experience. Experienced at DFT integration and validation in complex IP or SOC.
Inside this Business Group
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
US, California, Folsom;US, California, Santa Clara;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Annual Salary Range for jobs which could be performed in US, Colorado:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here (https://www.intel.com/content/www/us/en/jobs/benefits.html)
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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