Intel IP Validation Engineer in Hudson, Massachusetts
Intel's Intelligent Property Design Group (IPG) is looking for an experienced IP Verification Engineer to contribute in the high-performance power delivery/voltage regulator IP space for Intel's client/server/chipset SoC designs.
Responsibilities will include but not be limited to:
Defining the mixed signal IP verification plan, strategy and architecture
Development of functional validation tests to verify the IP/system meets design specification.
Defining, implementing, and deploying verification capabilities, methodologies, and process improvements.
Development and execution of test-plans, test-bench components (BFMs, checkers, trackers, scoreboards) and functional coverage.
Mixed signal behavior model development in System Verilog to enable IP level verification
Behavioral model vs Schematic simulations to ensure quality of behavior model.
Creating mixed signal setup/test-benches to enable spice simulations
Providing IP integration support to SoC customers and represent IP Verification team
Active participation in improvement of tools, flows and methodology for efficient design verification
The ideal candidate should exhibit behavioral traits that indicate:
Strong problem-solving, collaborative mindset, and excellent written and verbal communication skills with a cross-site, fast-moving team.
Can successfully work with a small team and manage multiple tasks independently with changing requirements in an innovative environment.
Good interpersonal skills
Strong discipline and attention to detail in ensuring high quality verification that minimizes bug escapes to higher levels of validation
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate must have a Bachelors degree in Electronic/Computer Engineering, Computer Science or related field and 4+ years of work experience – OR – a Masters degree in Electronic/Computer Engineering, Computer Science or related field and 3+ years of work experience – OR – a PhD in Electronic/Computer Engineering, Computer Science or related field and 1+ years of work experience.
5+ years of experience with:
Pre-silicon ASIC/SOC mixed signal verification, including but not limited to validation environment development, tests development, test plan development, tests debugging
Scripting languages such as TCL/Perl/Python
System Verilog and VerilogAMS coding
Analog basics and Analog transistor-based circuits
SoC or large systems pre-silicon and post silicon verification
Object-oriented programming knowledge (C++, System Verilog)
Testbench component development in OVM/UVM and test debugging
Computer Architecture Design
1+ years of experience with:
- Running AMS simulations with Synopsis-VCSXA and Cadence-AMS would be a plus.
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
US, Oregon, Hillsboro
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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