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Intel Logic Design, Micro-Architect Data-Center Pathfinding Engineer in Hudson, Massachusetts

Job Description

The Datacenter Technology and Pathfinding Team is responsible for cross disciplined collaboration to optimize Architecture, Design, Technology, and Platform to support the Intel Datacenter product road map. The team provides advance development and pathfinding work to support next generation products. This includes test chip development and hands on work partnering with design teams to transfer and implement the new approaches.

Job Description: Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs and test chips. The engineer will be responsible for working in multi-disciplined teams to propose and investigate design methodologies and technologies to support Intel's data center product roadmap. Technical focus areas will include: repair and recovery schemes to improve yield and robustness of products; error detection and correction schemes; soft error resiliency; Memory sub-system architecture investigations and building test chip system micro-architectures to evaluate implementations. The Engineer will participate in the development of Architecture and Microarchitecture specifications for the Logic components. Implement RTL in System Verilog, validating the design, and being involved in synthesis and design convergence while optimizing across trade-offs of modularity, cost, scalability, DFX requirements, power, area, and performance.

The Role requires: � Good verbal and written communication skills, and clarity in technical communications. � Self-starter with the ability to work independently, with an aptitude to learn new things quickly. � Proven ability to lead technical projects, working with multi-functional and cross-site groups. � Staying current in the latest research papers and industry news and trends � Demonstrated leadership skills needed to form and build teams, attract, coach, and develop architects and engineers, and establish functional quality development processes. � Ability to work in a dynamic and team-oriented environment


Bachelor's degree with 3+ years experience in computer and electrical engineering, or a maters degree with 1 year experience. Expertise in microarchitecture, design, development and integration of design blocks (IP) for system-on-chip (SoC) components. Expertise in verilog and system verilog based logic design. Extensive RTL coding and micro-architecture definition experience.

Knowledge of the follows logic systems: � Memory Subsystem Design � Test architecture and Implementation � Error Detection and Correcting Architectures � Reset and Power-up Flows. � Self-Test, Repair, and defeaturing schemes � Soft errors and reliability failure mechanisms

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, California, Santa Clara;US, Colorado, Fort Collins;US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:



We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here (

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.