Intel Pre-Si Verification / Validation Methodology Expert in Hudson, Massachusetts
We are looking for experienced Front End Design Methodology engineers who have a passion for having deep technical expertise, doing hands on work, and delivering front end design methodology solutions for the Intel IP Group (IPG). IPG provides a wide range of IPs to multiple SoC design teams.
In this role you will have the opportunity to be the expert for defined front end design methodology areas.
The team works to identify areas of methodology improvement through future trends or IP / SOC team needs.
Within the team we drive from concept through delivery.
In addition to the qualifications listed below the ideal candidate will also have:
Excellent analytical and problem-solving skills
Strong verbal/written communication skills
Effective team player with continuous learning mindset
Willingness to balance multiple tasks
Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate must have a Bachelor's degree in Computer Science / Computer/Electrical Engineering or related field and 6+ years of work experience -OR- a Master's degree in Computer Science/ Computer/Electrical Engineering or related field and 4+ years of work experience in:
Expertise in Pre-Si Verification / Validation Design Methodology
Technical RTL Verification or Front End Infrastructure Design methodology expertise
Knowledge of latest advancements in IP or SoC Front End Design tools flows and methodologies
Design automation tool qualification and deployment Front end to back end structural design handoff Scripting skills for Front End Design flows
Defining future methodologies based on design team needs and projected future needs
Work with vendors that supply tools to support the Front End RTL development and verification flows
Work with IP and SoC teams to collect future needs
Expertise in one or more of the following:
Design capture RTL Verification functional or RTL based physical verification
Gate level synthesis Simulation
Emulation test generation design repository change qualification release packaging for customer delivery build systems
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
US, California, Santa Clara
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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