Intel Validation Infrastructure Development Engineer in Hudson, Massachusetts
Are you ready to join Intel's high-performance Server Development Group, producing the industry's highest performing processor designs, used in everything from Cloud, to 5G Networking, to High Performance Computing and beyond.
In this position you will:
Develop critical test bench components to enable efficient validation of highly complex CPU designs which includes generation of efficient stimulus and RDL/RAL flows
As part of a central team, you will deliver methodology, framework, and detailed code to the entire Intel server portfolio
Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science, with at least five years of relevant work experience, or Master's degree and 3+ years of experience in validation or design automation
5 years’ experience with System Verilog (SV), C++, and verification design patterns to enable reusable environments and reduce code cost and maintenance
2+ years’ experience with UVM/OVM framework libraries
Experience in OVM/UVM RAL register descriptions, and RDL
Experience with Perl, Python, and shell scripting
Experience in configuration/initialization flows, portable stimulus development, and overall test bench development
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
US, California, Santa Clara;US, Colorado, Fort Collins
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