Cisco ASIC Design Verification Engineer - Acacia in Maynard, Massachusetts
Acacia, now part of Cisco, provides innovative silicon-based high speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs and coherent modules empower cloud and service providers to meet the fast-growing demand for data. We have assembled a team of cross-functional experts capable of solving the challenges of next generation optical interconnects, resulting in industry-leading, award-winning products. Come join us at Cisco, named the #1 world’s best workplaces, and do purposeful work that makes a global impact and gives back to a company culture that empowers an inclusive future for all.
The ASIC Design Verification Engineer will be a member of a team working on next generation 100G-1T coherent optical communications products. This role is a senior contributor focused on verifying highly-complex ASICs that are used in these next-generation telecom systems. The role combines applying sophisticated verification techniques to perform advanced individual contributions to the projects with developing process improvements for the team, mentoring teammates on techniques, technology & best-methods, and communicating with other technical leaders around the engineering community to add value to the ASIC projects.
A successful candidate will be highly self-motivated, collaborative and passionate about delivering the most advanced high speed optical products in the world. Knowledge of object-oriented verification methodologies is required.
Key Essential Functions:
Develop detailed and comprehensive test plans
Develop verification test benches
Timely execution of test plans
Assist with chip level design tradeoffs by working with design engineers
Participate in review of design verification coding and coverage metrics
Participate and assist in FPGA emulation efforts
Work collaboratively with team to develop & incorporate latest technologies & processes
Provide technical leadership & mentoring
Minimum Qualifications, Experience, Skills, Education and Certifications:
Bachelors or Masters degree majoring in Computer Science, Computer Engineering, or Electronic or Electrical Engineering with 6 or more years of industry/commercial experience.
Experience with the latest ASIC verification methodologies, tools and scripting/programming languages
Knowledge of SystemVerilog/UVM, SystemC
Knowledge of C and/or C++
Proven track record of innovation that leads to quantifiable improvements
Self-motivation and the ability to execute effectively without supervision
Knowledge of DSP algorithms and modulation techniques such as QAM is a plus
Lab silicon validation experience is a plus
Knowledge of Formal Verification methodologies and tools such as Jasper a plus.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status.
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