Cisco DSP Engineer - Technical Lead - Acacia in Maynard, Massachusetts
Acacia designs intelligent transceivers using sophisticated signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.
We are looking for enthusiastic people with high energy and a positive team attitude who want to work at the forefront of fiber optic transmission subsystems.
Acacia is looking for an expert in Digital Signal Processing (DSP) for coherent optical transmission systems, with extensive experience designing Forward Error Correction (FEC) algorithms.
You will be a core member of the team designing the DSP and FEC architecture and algorithms for our coherent application-specific integrated circuits (ASICs). We believe that industry-leading performance and power efficiency require very close cooperation between the algorithm design and implementation, which means you should enjoy working closely with colleagues in the DSP and ASIC teams to optimize algorithms and ASIC implementation to get the desired performance at the lowest possible power.
Before we tape out a coherent ASIC, you will contribute to the high-level system design and analysis including decisions on FEC/coding, modulation formats, and equalization principles. You will develop architectures and algorithms for various FEC/DSP functions, including design and modelling of fixed-point implementation and validation in system simulations. You will create DSP block specifications appropriate for ASIC implementation working closely and iteratively with the ASIC designers and support the ASIC design verification (DV) working closely with the DV engineers. During the entire creative development process, DSP and ASIC teams work closely together to meet aggressive performance and power consumption targets. When the coherent ASIC silicon is available, you will work with DSP, ASIC, hardware, software, and optical system testing colleagues on bring-up, debugging, and performance optimization of the coherent ASIC and the optical transceivers that are based on it.
At Acacia, we take pride in delivering coherent interfaces with the highest capacity/reach and the lowest power consumption to our customers which is only possible with a team of skillful, technically ambitious, creative, and persistent colleagues who are willing to go through multiple design iterations if necessary.
Besides the FEC and algorithm work, you will have numerous opportunities to work with colleagues in optical system testing, ADC/DAC development, software, hardware, optical component design, and other fields thereby acquiring a lot of new and diverse knowledge.
Skills and experience
Must have 6+ years of industry experience developing FEC algorithms and a good overall understanding of optical communications systems and information theory, ideally with direct experience with FEC for optical transmission systems.
Furthermore, you should have experience with and interest in fixed point and real-time implementation of DSP algorithms, strong C++ skills, and it is highly desirable if you have experience with Verilog or VHDL.
While we don’t have rigid requirements to education, we think a master’s or Ph.D. degree in mathematics, physics or electrical engineering is a good background for this job.
Acacia work philosophy
A friendly, open and collaborative work environment is a key value at Acacia. We work together within the group and between the groups to create and implement great ideas, peer-review designs to eliminate mistakes, and share the workload in a balanced way.
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